MP3101
Main Processor Module · MPC860 · 50 MHz · 16 MB · 8 KB
Lifecycle note: The attached specification is the Trident Version 1.2 guide. Confirm the actual system release before applying capacity or replacement rules; preserve application, firmware and retentive-state records.
ItemNO:
MP3101Product Condition
Original New with One Year WarrantyParts Available
In Stock and Same Day ShippingDelivery Mode
Shipping via DHL Fedex or UPS etcMain Processor Module · Trident Systems
Triconex MP3101 is the Trident main processor identified as model 3101 in the original manufacturer guide. Each MP serves one channel, and three MPs occupy the model 2101 MP baseplate in the minimum system.
The Version 1.2 specification lists Motorola MPC860 32-bit processors at 50 MHz for both application and I/O execution. Application DRAM is 16 MB, retentive NVRAM is 8 KB, and the processor channels communicate over the 25 Mbps TriBus.
Treat the attached Version 1.2 specifications as release-specific evidence. Preserve the installed application and firmware baseline, establish the approved state of all three channels, and follow the system replacement procedure before restoring normal service.
| Manufacturer | Triconex |
|---|---|
| Model | MP3101 / manufacturer base model 3101 |
| Module type | Trident main processor |
| Specification context | Trident Version 1.2, document 9720070-003 |
| Processor arrangement | Three MPs on one model 2101 baseplate |
| Application processor | Motorola MPC860, 32-bit, 50 MHz |
| I/O processor | Motorola MPC860, 32-bit, 50 MHz |
| Application DRAM | 16 MB, byte parity |
| I/O processor DRAM | 16 MB, byte parity |
| Flash PROM allocation | 6 MB for SX, IOX and control application; CRC protected |
| Retentive NVRAM | 8 KB, CRC protected |
| Shared memory | 128 KB, byte parity |
| TriBus / I/O bus | 25 Mbps TriBus; RS-485 2 Mbps HDLC I/O bus |
| Baseplate communication ports | One 10BaseT TriStation and one RS-232/485 Modbus port per MP |
The attached specification is the Trident Version 1.2 guide. Confirm the actual system release before applying capacity or replacement rules; preserve application, firmware and retentive-state records.
No. The guide describes one MP as one channel and three MPs on the MP baseplate. A single replacement module is not a complete three-channel controller.
The Version 1.2 specification identifies 8 KB of CRC-protected NVRAM for retentive variables. This is separate from the 16 MB application DRAM.
The application processor executes the system executive and control application, while the I/O processor executes the I/O executive. They have separate duties and DRAM allocations.
No. The guide allocates 6 MB of flash to stored SX, IOX and control application content, and 16 MB of DRAM to application execution and program/SOE data.
The shielded RJ-45 TriStation connector and DB-9 Modbus connector are on the MP baseplate. Check the baseplate connections as well as the removable processor.
No. Capacity and supported module combinations depend on the installed release. The attached historical guide must not be used to impose its Version 1.2 limit on a different approved system.
TriBus exchanges processor-channel voting and diagnostic information. The RS-485 HDLC I/O bus carries communication with the I/O modules; the two published speeds describe different buses.
Keep the approved application and firmware backup, record the retentive-variable requirements, and establish the operating state of the other processor channels under the site replacement procedure.
Send the model, complete part number, quantity, destination and nameplate photo. We will verify identification details before confirming availability and lead time.
Manufacturer PDF extract: MP3101 — Sales PLC Cover & Triconex Documentation. File size is below 1 MB; verify the exact installed hardware and configuration before use.
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